Design, Analysis and Test of Logic Circuits Under Uncertainty

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Smita Krishnaswamy, "Design, Analysis and Test of Logic Circuits Under Uncertainty "
English | ISBN: 9048196434 | 2013 | 124 pages | PDF | 5 MB

Logic circuits are becoming increasingly susceptible to probabilistic behavior caused by external radiation and process variation. In addition, inherently probabilistic quantum- and nano-technologies are on the horizon as we approach the limits of CMOS scaling. Ensuring the reliability of such circuits despite the probabilistic behavior is a key challenge in IC design--one that necessitates a fundamental, probabilistic reformulation of synthesis and testing techniques. This monograph will present techniques for analyzing, designing, and testing logic circuits with probabilistic behavior.

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